Transistors in a data path or interface can experience degradation or end-of-life (EOL) effects if stressed or used in certain ways. For example, aging of the transistors can occur if data signals are communicated which result in an imbalance in the static probability of one logical state versus another. Static probability of a particular logical state can be expressed as a ratio of the time spent in the particular logical state to the time spent in all logical states.
Aging of transistors can increase delay or uncertainty associated with transitions between logical states. Since each aged transistor can contribute a respective delay, the total delay experienced by a signal communicated over a data path is typically increased by the number of transistors in the data path. As such, timing uncertainty caused by variation in the total delay can significantly decrease system margin, thereby limiting the speed of data transmission over conventional interfaces using conventional communication circuitry.
Another EOL effect that can increase timing uncertainty is recovery. Recovery refers to the healing or reversal of the aging effect while a transistor is in the “off” state. An aged transistor that is provided a longer recovery time is generally able to more quickly transition from an “off” state to an “on” state than another aged transistor that has been provided a shorter recovery time. Additionally, the delay resulting from the recovery effect may vary from transistor to transistor and may be dependent upon one or more transistor-specific factors such as aging and the like. Accordingly, the delay variation from the recovery effect can further decrease the system margin, thereby further limiting the speed of data transmission over conventional interfaces using conventional communication circuitry.